{"52772":{"#nid":"52772","#data":{"type":"event","title":"CS Distinguished Lecture - Josep Torrellas","body":[{"value":"\u003Cp\u003EJosep Torrellas\u003Cbr \/\u003EProfessor, Computer Science Department\u003Cbr \/\u003EUniversity of Illinois, Urbana-Champaign\u003C\/p\u003E\n\u003Cp\u003ETITLE:\u00a0 Multiprocessor Architectures for Speculative Multithreading\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 \u003C\/p\u003E\n\u003Cp\u003EABSTRACT:\u00a0 One of the biggest challenges facing computer architecture today is the design of parallel architectures that make it easy for programmers to write parallel codes. One of the architectural technologies that is showing great versatility and potential in this direction is Speculative Multithreading.\u00a0 In this talk, I will discuss the many uses of this technology in multiprocessors, and its remarkable potential for performance and programmability (Thread-Level Speculation, Speculative Synchronization, Transactional Memory, and BulkSC), hardware reliability (Paceline), and software dependability (ReEnact and Iwatcher).\u003C\/p\u003E\n\u003Cp\u003EBIO:\u00a0 Josep Torrellas (\u003Ca href=\u0022http:\/\/iacoma.cs.uiuc.edu\u0022 title=\u0022http:\/\/iacoma.cs.uiuc.edu\u0022\u003Ehttp:\/\/iacoma.cs.uiuc.edu\u003C\/a\u003E) is a Professor and Willett Faculty Scholar at the University of Illinois. Prior to being at Illinois, Torrellas received a PhD from Stanford University.\u00a0 He also spent a year IBM\u0027s T.J. Watson Research Center. Torrellas\u0027s research area is multiprocessor computer architecture. He has been involved in the Stanford DASH and the Illinois Cedar multiprocessor projects, and lead the Illinois Aggressive COMA and FlexRAM Intelligent Memory projects.\u003C\/p\u003E","summary":null,"format":"limited_html"}],"field_subtitle":"","field_summary":"","field_summary_sentence":"","uid":"27154","created_gmt":"2010-02-11 15:57:50","changed_gmt":"2016-10-08 01:50:09","author":"Louise Russo","boilerplate_text":"","field_publication":"","field_article_url":"","field_event_time":{"event_time_start":"2008-04-09T14:00:00-04:00","event_time_end":"2008-04-09T15:00:00-04:00","event_time_end_last":"2008-04-09T15:00:00-04:00","gmt_time_start":"2008-04-09 18:00:00","gmt_time_end":"2008-04-09 19:00:00","gmt_time_end_last":"2008-04-09 19:00:00","rrule":null,"timezone":"America\/New_York"},"extras":[],"groups":[{"id":"47223","name":"College of Computing"}],"categories":[],"keywords":[],"core_research_areas":[],"news_room_topics":[],"event_categories":[],"invited_audience":[],"affiliations":[],"classification":[],"areas_of_expertise":[],"news_and_recent_appearances":[],"phone":[],"contact":[{"value":"Jennifer Chisholm","format":"limited_html"}],"email":[],"slides":[],"orientation":[],"userdata":""}}}