<node id="670608">
  <nid>670608</nid>
  <type>event</type>
  <uid>
    <user id="28475"><![CDATA[28475]]></user>
  </uid>
  <created>1698087262</created>
  <changed>1698087283</changed>
  <title><![CDATA[Ph.D. Dissertation Defense - Samantha Lubaba Noor]]></title>
  <body><![CDATA[<p><span><span><strong><span>Title</span></strong><em><span>:&nbsp; </span></em><em><span>Design and Optimization of Integrated Plasmonic Devices for High-performance Computing</span></em></span></span></p>

<p><span><span><strong><span>Committee:</span></strong></span></span></p>

<p><span><span><span>Dr. </span><span>Azad Naeemi, ECE, Chair</span><span>, Advisor </span></span></span></p>

<p><span><span><span>Dr. </span><span>Wenshan Cai, ECE</span></span></span></p>

<p><span><span><span>Dr. </span><span>Jeffrey Davis, ECE</span></span></span></p>

<p><span><span><span>Dr. </span><span>Thomas Gaylord, ECE</span></span></span></p>

<p><span><span><span>Dr. </span><span>Francky Catthoor, KU Leuven</span></span></span></p>
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  <field_summary_sentence>
    <item>
      <value><![CDATA[Design and Optimization of Integrated Plasmonic Devices for High-performance Computing ]]></value>
    </item>
  </field_summary_sentence>
  <field_summary>
    <item>
      <value><![CDATA[<p>The doctoral thesis aims to design an integrated plasmonic computing module for high-end streaming server applications with optimized system-level performance, considering the trade-offs among footprint, throughput, latency, energy consumption, and thermal management. The computing module includes photonic to plasmonic mode converters to generate surface plasmon polariton (SPP) waves, plasmonic phase modulators to encode data, a plasmonic logic gate for wave computation, and a plasmonic photodetector to convert the logic gate output to electrical signal. For SPP excitation, five different mode converters are designed and compared based on footprint and coupling efficiency. For data encoding, a plasmonic phase shifter with nonlinear electro-optic slot material is analytically modeled. The logic gate used in the study produces multiple output levels and performs non-Boolean functionalities like majority and threshold operations. Moreover, a plasmonic detector is designed and coupled to the logic gate, and its performance is optimized. The system design and optimization also consider the analysis of high-speed CMOS circuits using advanced technology nodes (3nm and 5nm) &nbsp;for output readout purposes and driving the plasmonic phase modulator. Using the modeling framework, the Q factor and bit-error ratio of the integrated devices are calculated. Additionally, thermal analysis is performed to find the average temperature of the devices. From the analysis, the design parameters, such as the length of the phase shifter, the driving voltage, and the input optical power, are selected, targeting a realistic BER of 10^-3 and ensuring that the generated heat density is within the operation limit of the individual devices.</p>
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    </item>
  </field_summary>
  <field_time>
    <item>
      <value><![CDATA[2023-10-30T12:00:00-04:00]]></value>
      <value2><![CDATA[2023-10-30T14:00:00-04:00]]></value2>
      <rrule><![CDATA[]]></rrule>
      <timezone><![CDATA[America/New_York]]></timezone>
    </item>
  </field_time>
  <field_fee>
    <item>
      <value><![CDATA[]]></value>
    </item>
  </field_fee>
  <field_extras>
      </field_extras>
  <field_audience>
          <item>
        <value><![CDATA[Public]]></value>
      </item>
      </field_audience>
  <field_media>
      </field_media>
  <field_contact>
    <item>
      <value><![CDATA[]]></value>
    </item>
  </field_contact>
  <field_location>
    <item>
      <value><![CDATA[Online]]></value>
    </item>
  </field_location>
  <field_sidebar>
    <item>
      <value><![CDATA[]]></value>
    </item>
  </field_sidebar>
  <field_phone>
    <item>
      <value><![CDATA[]]></value>
    </item>
  </field_phone>
  <field_url>
    <item>
      <url><![CDATA[]]></url>
      <title><![CDATA[]]></title>
            <attributes><![CDATA[]]></attributes>
    </item>
  </field_url>
  <field_email>
    <item>
      <email><![CDATA[]]></email>
    </item>
  </field_email>
  <field_boilerplate>
    <item>
      <nid><![CDATA[]]></nid>
    </item>
  </field_boilerplate>
  <links_related>
          <item>
        <url>https://teams.microsoft.com/l/meetup-join/19%3ameeting_Zjg4ZjI2MzAtYTExMi00Y2E0LWE5NjUtZTA1YzA1MzM0NjJi%40thread.v2/0?context=%7b%22Tid%22%3a%22482198bb-ae7b-4b25-8b7a-6d7f32faa083%22%2c%22Oid%22%3a%2294ee09d9-0e61-4719-801d-1b20ed423152%22%7d</url>
        <link_title><![CDATA[Microsoft Teams Meeting link]]></link_title>
      </item>
      </links_related>
  <files>
      </files>
  <og_groups>
          <item>434381</item>
      </og_groups>
  <og_groups_both>
          <item><![CDATA[ECE Ph.D. Dissertation Defenses]]></item>
      </og_groups_both>
  <field_categories>
          <item>
        <tid>1788</tid>
        <value><![CDATA[Other/Miscellaneous]]></value>
      </item>
      </field_categories>
  <field_keywords>
          <item>
        <tid>100811</tid>
        <value><![CDATA[Phd Defense]]></value>
      </item>
          <item>
        <tid>1808</tid>
        <value><![CDATA[graduate students]]></value>
      </item>
      </field_keywords>
  <userdata><![CDATA[]]></userdata>
</node>
