{"670980":{"#nid":"670980","#data":{"type":"event","title":"Ph.D. Proposal Oral Exam - Shane Oh","body":[{"value":"\u003Cp\u003E\u003Cspan\u003E\u003Cspan\u003E\u003Cspan\u003E\u003Cstrong\u003E\u003Cspan\u003ETitle:\u0026nbsp; \u003C\/span\u003E\u003C\/strong\u003E\u003Cem\u003E\u003Cspan\u003E3D Heterogeneous Integration for mm-Wave Electronics\u003C\/span\u003E\u003C\/em\u003E\u003C\/span\u003E\u003C\/span\u003E\u003C\/span\u003E\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Cspan\u003E\u003Cspan\u003E\u003Cstrong\u003E\u003Cspan\u003ECommittee:\u0026nbsp; \u003C\/span\u003E\u003C\/strong\u003E\u003C\/span\u003E\u003C\/span\u003E\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Cspan\u003E\u003Cspan\u003E\u003Cspan\u003EDr. \u003C\/span\u003E\u003Cspan\u003EBakir\u003C\/span\u003E\u003Cspan\u003E, Advisor\u003C\/span\u003E \u003C\/span\u003E\u003C\/span\u003E\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Cspan\u003E\u003Cspan\u003E\u003Cspan\u003EDr. \u003C\/span\u003E\u003Cspan\u003ECressler\u003C\/span\u003E\u003Cspan\u003E, Chair\u003C\/span\u003E\u003C\/span\u003E\u003C\/span\u003E\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Cspan\u003E\u003Cspan\u003E\u003Cspan\u003EDr. \u003C\/span\u003E\u003Cspan\u003EAnsari\u003C\/span\u003E\u003C\/span\u003E\u003C\/span\u003E\u003C\/p\u003E\r\n","summary":"","format":"limited_html"}],"field_subtitle":"","field_summary":[{"value":"\u003Cp\u003E\u003Cspan\u003E\u003Cspan\u003E\u003Cspan\u003EThe objective of the proposed research is to address two challenges in heterogeneous integration solutions for RF\/mmWave and high-speed microelectronic systems: (1) for through-silicon via (TSV)-based integration platforms, significant RF losses arise due to dielectric losses, and crosstalk effects may affect signal integrity; (2) current RF packaging solutions like wirebonds suffer from parasitic inductance and limited bandwidth. Low-loss, low-reflection, and highly-customizable interconnect solutions are essential to drive performance and functionality. To address these challenges, we propose an advanced packaging platform with (1) enhanced low-loss shielded TSVs and (2) impedance-matched, height difference-compensating off-chip transitions. The low-loss shielded TSVs, which are 10 \u03bcm wide and 50 \u03bcm deep, feature a deep annular air trench that reduced measured capacitance and conductance at 50 GHz by 38.4% and 51.6%, respectively. Simulation results indicate that the shielding configuration reduces coupling. The second part of the integration platform is termed 3D stitch-chip for its ability to electrically stitch across components of different heights. To cover a 10-100 \u03bcm step height range, a monolithic connector chip with a sloped sidewall formed by KOH etching is proposed. For greater step heights, vertical connectivity is established by a small chip containing TSVs, while the lateral connectivity is enabled by a coplanar waveguide (CPW) trace on a fused silica chip. Gold stud bumps were used to bond the two components. Simulation results indicate better than 1 dB insertion loss (IL) and better than 17 dB return loss (RL) up to 50 GHz. Measurements up to 50 GHz will be performed, comparing the 3D stitch-chip to wirebonds. In addition, mechanical shear strength testing will be performed to verify the reliability of the assembly. An RF front-end module (FEM), such as a Ka band (26.5-40 GHz) low-noise amplifier (LNA) will be integrated to demonstrate the functionality of the stitching technology. Lastly, the design methodology will be extended to optimize the 3D stitch-chip for W band (75-110 GHz).\u003C\/span\u003E\u003C\/span\u003E\u003C\/span\u003E\u003C\/p\u003E\r\n","format":"limited_html"}],"field_summary_sentence":[{"value":"3D Heterogeneous Integration for mm-Wave Electronics"}],"uid":"28475","created_gmt":"2023-11-09 19:08:13","changed_gmt":"2023-11-09 19:09:16","author":"Daniela Staiculescu","boilerplate_text":"","field_publication":"","field_article_url":"","field_event_time":{"event_time_start":"2023-11-15T10:30:00-05:00","event_time_end":"2023-11-15T12:30:00-05:00","event_time_end_last":"2023-11-15T12:30:00-05:00","gmt_time_start":"2023-11-15 15:30:00","gmt_time_end":"2023-11-15 17:30:00","gmt_time_end_last":"2023-11-15 17:30:00","rrule":null,"timezone":"America\/New_York"},"location":"Room 509, TSRB","extras":[],"related_links":[{"url":"https:\/\/teams.microsoft.com\/l\/meetup-join\/19%3ameeting_NWNjNjRjZWYtOTUwNy00OGMyLWI5MWQtMWNmNmQzMjFjOWIz%40thread.v2\/0?context=%7b%22Tid%22%3a%22482198bb-ae7b-4b25-8b7a-6d7f32faa083%22%2c%22Oid%22%3a%22d1279d63-db8f-4004-aa57-5eb9f6f90e63%22%7d","title":"Microsoft Teams Meeting link"}],"groups":[{"id":"434371","name":"ECE Ph.D. Proposal Oral Exams"}],"categories":[],"keywords":[{"id":"102851","name":"Phd proposal"},{"id":"1808","name":"graduate students"}],"core_research_areas":[],"news_room_topics":[],"event_categories":[{"id":"1788","name":"Other\/Miscellaneous"}],"invited_audience":[{"id":"78771","name":"Public"}],"affiliations":[],"classification":[],"areas_of_expertise":[],"news_and_recent_appearances":[],"phone":[],"contact":[],"email":[],"slides":[],"orientation":[],"userdata":""}}}